For example, when starting a car, high battery voltage changes may occur. The operation of the microcontroller is granted by its recommended supply voltage range, and there is a risk of damage or uncertainty beyond these values.

In the absence of any nominal conditions, the role of the reset management circuit is to place c in a certain position. We will not discuss the different achievements that may be achieved in this document, but we will study different parameters for its implementation and the specific characteristics of each µC.

rule:

The reset must be performed before the power supply voltage VVD is lower than the minimum value of VDD.

ü If available in the IC, the reset circuit is asynchronous (no clock required). Especially to check with asic.

This avoids the problem of clock not running (or running too slow to catch the reset signal)

ü Use an appropriate capacitor (refer to the supplier's requirements) to decouple the reset pin to avoid noise interference

ü During the reset phase, the state of all input/output ports is usually defined. It must be ensured that at the application level, it does not lead to unwelcome situations.

After the voltage drops, the integrity of the reset data is not always granted. According to the selected µC, the possibility of data recovery exists under certain conditions.

In addition, the application recommends to observe the battery supply voltage to predict the reset state. In this case, the analog input of µC monitors the voltage, but it is absolutely necessary to check the following points:

ü The injection current value in the input protection circuit has no value.

ü Due to the battery voltage, the input is protected from overvoltage.

Example of battery voltage change

Power block diagram

Before VDD is lower than VDDmin, reset will occur. (The third point of the chart)

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