In a design a few days ago, because I wanted to observe some variables in the actual hardware implementation, the traditional logic analyzer is too expensive and requires a lot of probes. Some internal variables are not easy to observe the defects, so I thought of using the chipscope software for online logic analysis debugging. Normal Electric Test Pen,Screw-Driver With Voltage Tester,Combination Screw Driver Set With Tester,Voltage Detector Tester YINTE TOOLS (NINGBO) CO., LTD , https://www.yinte-tools.com
First, let's take a brief look at the features of chipscope (): The ChipScope? Pro tool plugs logic analyzers, bus analyzers, and virtual I/O small software cores directly into your design, allowing you to view any internal signal or node, including embedded hard Or a soft processor. Acquire the signal at or near the speed of the operating system and pull it out of the programming interface to free up more pins for your design. The acquired signals can be analyzed by the included ChipScope Pro Logic Analyzer.
The ChipScope Pro tool also interfaces with your Agilent platform test equipment via the ATC2 software core. This core keeps the ChipScope Pro tool and Agilent FPGA dynamic probe range options in sync. Xilinx's unique partnership with Agilent enables you to use fewer pins on your FPGA for deeper trace memory, faster clock speeds, and more trigger options.
The ChipScope Pro Serial I/O Toolkit enables you to easily and quickly implement interactive setup and debugging of serial I/O channels in high-speed FPGA designs. The ChipScope Pro Serial I/O Toolkit enables you to measure bit error rates across multiple channels and adjust high speed serial transceiver parameters in real time while your serial I/O channels interact with the rest of the system.
Then talk about the process of learning chipscope to complete a simple operation. The first reference is the book "Xilinx FPGA Development Practical Tutorial" published by Tsinghua University Press. It details the features of the chipscope tool, the use of the Core Generator, the use of the core inserter, and the use of the chipscope Pro Analyzer, and gives an example that is very convenient. However, in the example, only in a crucial step, the ILA core did not give a description when it was connected to the signal in the design netlist. The result was only half a day after this step was successfully explored. During the period, I also referred to the "Intellectual Application Skills of FPGA Application Development" published by Huaqing Vision and some documents () under the chipscope folder on the Xilinx website, which finally succeeded.