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Fujitsu Microelectronics (Shanghai) Co., Ltd. announced the introduction of the MPEG-2 (*1) and H.264 (*2) video compression formats of the standard definition (SD) video multiplexer chip - MB86H01 series. This series of chips is specially launched for SD digital broadcasts in Russia, Eastern Europe and China. Samples have been available since December 1, 2008. Designed for the Russian, Eastern European and Chinese markets, these SoCs are the best choice for TVs and set-top boxes (STBs) in these markets. The new product integrates MPEG-2 and H.264 decoders on a single chip, and thus has all the functions of receiving SD broadcast, so it can support DVB (*3) broadcast standards in these regions; at the same time, this series of chips provides In small packages, these decoder chips are ideal for portable devices (personal navigation devices with built-in TV receivers, etc.). Broadcasting systems in Europe, Russia and parts of China use the DVB digital broadcasting standard. At present, SD broadcasts use MPEG-2 compression format extensively, and Eastern Europe (including Russia) will adopt the next-generation compression format-H.264 format. At the same time, some cable TV services in China are also expected to adopt the H.264 format in their interactive video on demand (VoD) (*4). To date, Fujitsu's MPEG-2 decoder chip, the SmartMPEG series, has been used in standard definition digital TV broadcasting and supports the DVB standard. Especially in Europe, the SmartMPEG series is widely used in TVs, set-top boxes and portable TV receivers. Since SD broadcasts in Russia, Eastern Europe, China and other regions are beginning to adopt the H.264 format, these regions require TVs and set-top boxes that support both MPEG-2 and H.264 formats. In response to this demand, Fujitsu began offering a new product that supports both MPEG-2 and H.264 formats - the MB86H01 series. The new multi-channel decoder chip supports the necessary functional features of TV and set-top boxes for standard-definition digital broadcasting, consisting of two (dual) MPEG-2 decoders and an H.264 decoder. The dual MPEG-2 decoder processes two video streams simultaneously and can be used in digital video recorders (DVRs) with dual tuners, and can also use the picture-in-picture function to view two programs simultaneously. Using H.264 decoder technology with proprietary intellectual property rights, the power consumption of H.264 decoders can be reduced to a lower level. With a small package of -10 mm × 10 mm (FBGA 240), the decoder is ideal for portable or small form factor devices. The decoder also integrates a high-speed USB 2.0 OTG controller, which greatly improves connectivity to external devices such as digital cameras. With high recognition of technologies and products in image and video processing, Fujitsu Microelectronics will focus on video processing dedicated chip products (ASSP) and continue to strengthen its launch on TV and set-top box video processing chip products (ASSP). Strength. Samples are available in MB86H01 series: MB86H01 AA (PBGA 256 feet) MB86H01 AB (FBGA 240 feet) Samples: Main features from December 1, 2008 1. Products include MPEG-2 dual developed specifically for Russia, Eastern Europe, China The decoder and H.264 decoder are capable of decoding standard definition MPEG-2 and H.264 compression formats, not only capable of handling MPEG-2 standard definition broadcasts in Europe (especially Western Europe), but also support standard definition broadcasts H that will emerge in Eastern Europe and Russia. The .264 format can be used for interactive video on demand (VoD) in some Chinese cable TV services. With a dual MPEG-2 decoder, viewers can view two programs simultaneously using the picture-in-picture function; this series of chips is also suitable for DVRs with dual tuners. 2. The necessary functions for processing SD broadcast are integrated on a single chip. This series of chips integrates a 202.5 MHz high-performance ARC CPU on a single chip, and supports the necessary audio and video decoding functions and screen display functions for receiving digital broadcasts. Develop a wide range of applications. 3. Small package, suitable for portable devices. H.264 decoder technology with independent intellectual property rights has achieved low power consumption. The MB86H01 series is available in a 27mm × 27mm package (PDGA 256-pin) and a small 10 mm × 10mm package (FBGA-240). It is ideal for portable devices such as personal navigation devices (PNDs) with built-in TV receivers. 4. Continuing the architecture of the current SmartMPEG family The chip is package and pin compatible with the current SmartMPEG-C family and retains architectural compatibility. This will increase the efficiency and current risk of system upgrades and developments for current SmartMPEG users. Terms and Notes *1. MPEG-2: refers to the video compression format (codec), which is part of the video compression MPEG standard. MPEG-2 is widely used in DVD and other video products. *2. H.264: H.264 is the latest international standard for video compression. It is a video decoding format (codec) developed by ITU-T (International Telecommunications Union, Telecommunications Standards Department). It is characterized by a higher compression ratio than MPEG-2 and other early formats. The MPEG-4 Part 10 Advanced Video Coding (MPEG-4 AVC) developed by ISO/IEC (International Organization for Standardization/International Electrotechnical Commission) is H.264. *3. DVB: Digital Video Broadcasting. It is an open standard for internationally recognized digital television broadcasting. DVB is widely used in many countries such as Europe. *4. Interactive Video on Demand (VoD) Service: A two-way interactive service that allows users to play corresponding video programs as needed.
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