In recent years, with the rapid development of computer technology and power technology, through continuous system function integration and optimization, network coverage area and transmission stability are increasing, and the analog signal part of the traditional analog video monitoring system has been abandoned. Completed the digital video surveillance system and added the AD conversion function to enable the entire video data to be transmitted on the network, meeting the needs of various industry departments and families for network visualization services. This all-digital video surveillance system has tremendous changes and upgrades in terms of system scale and system functionality compared to previous analog-to-digital hybrid systems. The general network video surveillance system only needs cameras, routers and computers to build, and the topology is simple. Utilizing the powerful processing power of the computer, the control efficiency of the monitoring system is improved, the intelligence of the monitoring system is improved, and the quality of the captured image is improved. The system structure based on network technology has clear structure, simple wiring and strong system extensibility, and a master computer will no longer have a limit on the number of camera devices that can be mounted as a DVR, and the topology is also reduced. Management difficulty and maintenance and repair costs of large-scale monitoring systems. The development of the system application layer can be carried out on a unified design platform such as a computer, which greatly simplifies the development of a special monitoring system.

This design decided to use the more mature TI DaVinci design framework in the industry. The design integrates both ARM and DSP components. This design combines the image processing module and camera control module in the system.

The underlying program based on the TMS320DM365 network camera will be described, including the kernel, driver, startup program, etc. The camera system is based on the DaVinci framework. The entire hardware foundation can refer to the previously published article "Network Video Surveillance System Based on TMS320DM365".

1 Network camera structure under the DaVinci framework

1.1 Introduction to the DaVinci Framework

The DaVinci framework is a comprehensive family of integrated DSP processors, software and tools from TI that is ideally suited for the development of digital video and audio equipment, including digital audio and video. Imaging, vision applications, etc. The goal of this technology is to make it easier and faster for developers to develop innovative, low-cost digital video products. The Davinci technology family of components includes not only the corresponding processors, software, tools, but also a range of solutions and technical support. Due to the high compatibility and commonality between products based on the DaVinci framework, many large companies are also happy to use TI's DaVinci solution to increase the compatibility of their products in the surrounding industries. And the DaVinci framework has a full range of software support, from the general operating system driver, to the application interface API, and even the DSP encoding program is also an intrinsic package integrated in the BIOS and Code Server.

1.2 DaVinci hardware foundation

As the basis of the underlying driver software, the hardware structure of the DaVinci framework needs to be described in detail here. DaVinci digital video processing chip is the core of the entire DaVinci technology framework. Its biggest feature is that the whole processing chip integrates ARM and DSP cores, and realizes two core parallel working and communication mechanisms. TMS320DM365 is a new chip under the DaVinci technology framework. It also has the same system as the previous series. A general DaVinci system structure is shown in Figure 1.

Underlying program based on TMS320DM365 network camera

DSP is a digital signal processor, its main feature is that it can perform a large number of multiply-accumulate operations, has high-speed computing capabilities, and DSP data and programs are stored separately, thus making full use of all line widths, further accelerating the processing speed of DSP, DSPs in digital cameras are designed to calculate a large amount of image processing algorithms. The functions of DSP include VPSS (Video Process ing Subsystem) and VICP (Video Image CollaboraTIve Processer). The video processing system VPSS is the video signal acquisition module of DM365. Compared with other camera control chips, the most remarkable feature is that DM365 has an ISIF module, which can directly obtain the output images of CCD and CMOS. Compared with general image processing chips, A/D processing is required in one step, and DM365 can acquire image signals more quickly. The video/image co-processor (VICP) is the main part of the DSP part of the DM365 chip. The main function is the video image compression algorithm, which is generally used. 264 compression method, which also includes algorithms such as motion compensation and object recognition. These image processing algorithms account for 600% to 80% of the total system operation.

Although ARM processor does not have the fast image processing speed of DSP, ARM's large program storage capacity and rapid task switching capability make it suitable for complex, multi-threaded task control and support real-time operating system. The ARM subsystem manages and coordinates the work of other functional modules in the chip, and performs system control tasks in a pipelined manner, such as system initialization, parameter configuration, power management, and user functions.

Underlying program based on TMS320DM365 network camera

The communication between the two is shown in Figure 2. The ARM in the chip can access the on-chip memory of the DSP, including L2RAM and L1 P/D. The DSP can also access the on-chip memory of ARM, and the ARM and DSP share DDR2 and AEMIF. AEMIF refers to an asynchronous external memory interface (Asynchronous External Memory Interface). Therefore, in general, ARM only needs to pass the address pointer of the processed data to the DSP without a large amount of data transmission. The DSP and ARM in the system communicate with each other through two core interrupts. ARM uses the DSP's four general-purpose interrupts and one non-maskable interrupt to control the DSP. The DSP interrupts the ARM through two interrupts. The power, clock, and reset of the DSP are controlled by the ARM.

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