How to improve the efficiency of domestic PLC operation and shorten the execution time when completing the same task - Database & Sql Blog Articles

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How to improve the efficiency of domestic plc operation and shorten the execution time when completing the same task. Lower performance products for higher performance processing requirements

(Reminder here: beginners don't have to care about the practices summarized in this article, and the program is easy to read and standard, and the functional requirements can be completed.)

1. When using "words" (such as VW units), try to avoid using "double words" (VD units). When using integers, try to avoid real/floating numbers.

2. Give priority to the use of IB, IW, ID, QB, QW, QD (other than hardware connection), followed by M, S;

3. Reduce unnecessary network scanning, classify networks that can be conditionally executed (especially AIW, AQW) into subroutines for conditional calls (such as timed interrupts);

4. Under the premise of ensuring the process requirements, appropriately reduce the frequency of interruptions;

5, the subroutine should try to reduce the number of conditional judgments, normalize the subroutine import and export parameters, thereby reducing code redundancy.

6. If SM0.0 is connected in series with other signals, it only increases the program size and execution time. There is no other function (if the network has already met the necessary contacts on the left side, it is not necessary to connect SM0.0 in series);

7. For subroutine calls with less input data, you can first determine whether the input data has changed. If there is no change (for comparison, refer to the 48th floor), you can skip the subroutine directly, thus reducing the scan cycle.

8. Reasonable use of immediate IO command (to minimize use) saves the conversion time of the domestic PLC to process the immediate command.

9. Try to use the calculation result memory instead of the transition memory in the calculation.

10, the amount to avoid data type conversion, had to use, try to use AC to store intermediate variables, reduce the number of conversions. Or, when programming, first reserve the storage space. For example, when VW2 is used to store an integer, VW0 is not used, and the data in VW2 can be directly accessed in the form of VD0.

11, use the XOR instruction to achieve any bit reversal (this instruction is slightly more difficult, more need to be carefully aligned in debugging);

12. For repetitive and time-consuming tasks, sub-cycle processing should be used; this includes: apportioning the initialization work to multiple cycles. The sampling time of multiple PID loops is slightly different to avoid multiple interrupt calls in the same cycle, which makes the scan cycle more uniform and stable.

13. Try to arrange the bit variable in the V zone in V511.7, and arrange the VB/VW/VD variable with high frequency in V4095 to shorten the program scanning cycle.

14. When there is no need to share the signal, multiple instructions placed in the same network will generate additional inbound and outbound operations (which can be converted into STL for analysis), which is also to increase the program size and execution time. The advantage is simply to put it in a network. Compact point.